Field of the Invention
The present invention relates to security settings in a multi-node computer system.
Background of the Related Art
Computer processors may be interconnected to achieve greater performance. The greater performance may include faster memory access or increased data handling capacity. An interconnection between two or more processors may be referred to as a bus, such as with the front side bus (FSB), or a point to point interconnect, such as with the Intel Corporation's QUICKPATH INTERCONNECT (QPI). When an interconnection is made between processors, the processors are referred to as being scaled and a cable used to complete the interconnection is referred to as a scalability cable.
Compute nodes may be scaled together and work together as a single multi-node system. The multi-node system boots using the basic input output system (BIOS) of only one of the compute nodes, which is referred to as the primary node. Other compute nodes within the multi-node system are referred to as secondary nodes. Typically, a user will use a system management interface to identify one of the compute nodes to serve as the primary node.
The compute nodes that are connected together to form a multi-node system may have different basic input output system (BIOS) versions and different security settings. However, the BIOS version and security settings of the primary node are applied to the multi-node system as a whole. If a user desires a different BIOS version or security settings, then it is necessary to update the BIOS version or change the security settings on the primary node.